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74VCX00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
July 1999 Revised February 2005
74VCX00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
General Description
The VCX00 contains four 2-input NAND gates. This product is designed for low voltage (1.2V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The VCX00 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation.
Features
s 1.2V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD
2.8 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Uses patented noise/EMI reduction circuitry s Latchup performance exceeds JEDEC 78 conditions s ESD performance:
Human body model ! 2000V Machine model ! 250V
s Leadless Pb-Free DQFN package
Ordering Code:
Order Number 74VCX00M 74VCX00BQX (Note 1) 74VCX00MTC 74VCX00MTCX_NL (Note 2) Package Number M14A MLP014A MTC14 MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Pb-Free package per JEDED J-STD-020B. Note 1: DQFN package available in Tape and Reel only. Note 2: "_NL" indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
(c) 2005 Fairchild Semiconductor Corporation
DS500160
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74VCX00
Logic Symbol
IEEE/IEC
Connection Diagrams
Pin Assignments for SOIC and TSSOP
Pin Descriptions
Pin Names An, Bn On Description Inputs Outputs
Pad Assignments for DQFN
(Top View)
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74VCX00
Absolute Maximum Ratings(Note 3)
Supply Voltage (VCC) DC Input Voltage (VI) Output Voltage (VO) HIGH or LOW State (Note 4) VCC 0V DC Input Diode Current (IIK) VI 0V DC Output Diode Current (IOK) VO 0V VO ! VCC DC Output Source/Sink Current (IOL/IOL) DC VCC or Ground Current per Supply Pin (ICC or Ground) Storage Temperature Range (Tstg)
0.5V to 4.6V 0.5V to 4.6V 0.5V to VCC 0.5V 0.5V to 4.6V 50 mA 50 mA 50 mA r50 mA r100 mA 65qC to 150qC
Recommended Operating Conditions (Note 5)
Power Supply Operating Input Voltage Output Voltage (VO) HIGH or LOW State Output Current in IOH/IOL VCC VCC VCC VCC VCC 3.0V to 3.6V 2.3V to 2.7V 1.65V to 2.3V 1.4V to 1.6V 1.2V 0V to VCC 1.2V to 3.6V
0.3V to 3.6V
Free Air Operating Temperature (TA) Minimum Input Edge Rate ('t/'V) VIN 0.8V to 2.0V, VCC 3.0V
r24 mA r18 mA r6 mA r2 mA r 100 PA 40qC to 85qC
10 ns/V
Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 4: IO Absolute Maximum Rating must be observed. Note 5: Floating or unused inputs must be held HIGH or LOW
DC Electrical Characteristics
Symbol VIH Parameter HIGH Level Input Voltage Conditions VCC (V) 2.7 - 3.6 2.3 - 2.7 1.65 - 2.3 1.4 - 1.6 1.2 VIL LOW Level Input Voltage 2.7 - 3.6 2.3 - 2.7 1.65 - 2.3 1.4 - 1.6 1.2 VOH HIGH Level Output Voltage IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH IOH Min 2.0 1.6 0.65 u VCC 0.65 u VCC 0.65 u VCC 0.8 0.7 0.35 u V CC 0.35 u V CC 0.05 x VCC VCC 0.2 2.2 2.4 2.2 VCC 0.2 2.0 1.8 1.7 VCC 0.2 1.25 VCC 0.2 1.05 VCC 0.2 V V V Max Units
100 PA 12 mA 18 mA 24 mA 100 PA 6 mA 12 mA 18 mA 100 PA 6 mA 100 PA 2 mA 100 PA
2.7 - 3.6 2.7 3.0 3.0 2.3 - 2.7 2.3 2.3 2.3 1.65 - 2.3 1.65 1.4 - 1.6 1.4 1.2
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74VCX00
DC Electrical Characteristics
Symbol VOL Parameter LOW Level Output Voltage IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL II IOZ IOFFI ICC Input Leakage Current 3-STATE Output Leakage Power-OFF Leakage Current Quiescent Supply Current Increase in ICC per Input
(Continued)
VCC (V) 100 PA 12 mA 18 mA 24 mA 100 PA 12 mA 18 mA 100 PA 6 mA 100 PA 2 mA 100 PA 2.7 - 3.6 2.7 3.0 3.0 2.3 - 2.7 2.3 2.3 1.65 - 2.3 1.65 1.4 - 1.6 1.4 1.2 1.4 - 3.6 1.4 - 3.6 0 1.4 - 3.6 1.4 - 3.6 2.7 - 3.6 0.2 0.4 0.4 0.55 0.2 0.4 0.6 0.2 0.3 0.2 0.35 0.05 V
Conditions
Min
Max
Units
0 d VI d 3.6V 0 d VO d 3.6V VI VI VIH VIH or VIL VCC or GND VCC 0.6V 0 d (VI, VO) d 3.6V VCC d (VI, VO) d 3.6V (Note 6)
r5.0 r10
10 20
PA PA PA PA PA
r20
750
'ICC
Note 6: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
Symbol tPHL, tPLH CL tOSHL tOSLH Output to Output Skew (Note 8) CL
Note 7: For CL
(Note 7)
Conditions VCC (V) 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15 TA
Parameter Propagation Delay CL
40qC to 85qC
Max 2.8 3.7 7.4 14.8 37.0 0.5 0.5 0.75 1.5 1.5 0.6 0.8 1.0 1.0 1.5
Min
Units
Figure Number Figures 1, 2
30 pF, RL
500:
ns Figures 3, 4
15 pF, RL 30 pF, RL
2k: 500:
1.5 r 0.1 1.2 3.3 r 0.3 2.5 r 0.2 1.8 r 0.15
CL
ns
15 pF, RL
2k:
1.5 r 0.1 1.2
50PF, add approximately 300 ps to the AC maximum specification.
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
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74VCX00
Dynamic Switching Characteristics
Symbol VOLP Parameter Quiet Output Dynamic Peak VOL CL 30 pF, VIH Conditions VCC, VIL 0V VCC (V) 1.8 2.5 3.3 VOLV Quiet Output Dynamic Valley VOL CL 30 pF, VIH VCC, VIL 0V 1.8 2.5 3.3 VOHV Quiet Output Dynamic Valley VOH CL 30 pF, VIH VCC, VIL 0V 1.8 2.5 3.3 TA 25qC Typical 0.25 0.6 0.8 V Unit
0.25 0.6 0.8
1.5 1.9 2.2 V V
Capacitance
Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter VI VI VI 0V or VCC, VCC 0V or VCC, VCC 0V or VCC, f Conditions 1.8V, 2.5V or 3.3V 1.8V, 2.5V or 3.3V 1.8V, 2.5V or 3.3V TA
25qC
6 7 20
Typical
Units pF pF pF
10 MHz, VCC
AC Loading and Waveforms (VCC 3.3V r 0.3V to 1.8V r 0.15V)
FIGURE 1. AC Test Circuit TEST tPLH, tPHL SWITCH Open
FIGURE 2. Waveform for Inverting and Non-inverting Functions Symbol Vmi Vmo VCC 3.3V r 0.3V 1.5V 1.5V 2.5V r 0.2V VCC/2 VCC/2 1.8V r 0.15V VCC/2 VCC/2
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74VCX00
AC Loading and Waveforms (VCC 1.5 r 0.1V to 1.2V)
TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ
SWITCH Open VCC x 2 at VCC GND FIGURE 3. AC Test Circuit 1.5V r 0.1V
FIGURE 4. Waveform for Inverting and Non-Inverting Functions
Symbol Vmi Vmo
VCC 1.5V r 0.1V VCC/2 VCC/2
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74VCX00
Tape and Reel Specification
Tape Format for DQFN Package Designator BQX Tape Section Leader (Start End) Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) Number Cavities 125 (typ) 2500/3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed
REEL DIMENSIONS inches (millimeters)
Tape Size 12 mm
A 13.0 (330)
B 0.059 (1.50)
C 0.512 (13.00)
D 0.795 (20.20)
N 7.008 (178)
W1 0.488 (12.4)
W2 0.724 (18.4)
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74VCX00
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A
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74VCX00
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm Package Number MLP014A
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74VCX00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 10 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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